List of Tables

2.1 Predefined macros
2.2 Emmbedded target memory layout
6.1 Intel 80x86 Register table
6.2 Motorola 680x0 Register table
6.3 Calling mechanisms in Free Pascal
6.4 Stack frame when calling a nested procedure (32-bit processors)
6.5 Stack frame when calling a procedure (32-bit model)
6.6 Maximum limits for processors
8.1 Enumeration storage for tp mode
8.2 Processor mapping of real type
8.3 AnsiString memory structure (32-bit model)
8.4 AnsiString memory structure (64-bit model)
8.5 UnicodeString memory structure (32-bit model)
8.6 UnicodeString memory structure (64-bit model)
8.7 Object memory layout (32/64-bit model)
8.8 Object Virtual Method Table memory layout (32/64-bit model)
8.9 Class memory layout (32/64-bit model)
8.10 Class Virtual Method Table memory layout (32/64-bit model)
8.11 Data alignment
8.12 ReturnNilIfGrowHeapFails value
12.1 Shared library support
A.1 PPU Header
A.2 PPU CPU Field values
A.3 PPU Header Flag values
A.4 chunk data format
A.5 Possible PPU Entry types
F.1 Possible defines when compiling FPC
G.1 Possible defines when compiling using FPC
G.2 Possible CPU defines when compiling using FPC
G.3 Possible FPU defines when compiling using FPC
G.4 Possible defines when compiling using target OS
G.5 Feature defines
G.6 Temporary Feature defines
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