Test suite results for test file test/tfpu1.pp

Test run data :

Free Pascal Compiler Test Suite Results

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Test file "test/tfpu1.pp" information:

t_id 38
t_cpu I386
t_adddate 2003/10/03
t_result 0
t_knownrunerror 0

Detailed test run results:

Record count: 50

Total = 50

OK=4 Percentage= 8.00

Skipped=46 Percentage= 92.00

Result type Cat. Count Percentage First date Last Date
Successfully run 4 8.0 2024/05/08 10:58:00 42 2024/05/08 11:43:00 35
i386 4 100.0 2024/05/08 10:58:00 42 2024/05/08 11:43:00 35
linux 3 75.0 2024/05/08 10:58:00 42 2024/05/08 11:10:00 236
win32 1 25.0 2024/05/08 11:43:00 35 2024/05/08 11:43:00 35
3.3.1 3 75.0 2024/05/08 10:58:00 42 2024/05/08 11:10:00 236
3.2.3 1 25.0 2024/05/08 11:43:00 35 2024/05/08 11:43:00 35
Skipping test because for other cpu 46 92.0 2024/05/08 10:35:00 103 2024/05/08 11:58:00 0
m68k 3 6.5 2024/05/08 11:08:00 53 2024/05/08 11:19:00 244
sparc 2 4.3 2024/05/08 11:36:00 76 2024/05/08 11:58:00 0
powerpc 15 32.6 2024/05/08 10:55:00 44 2024/05/08 11:54:00 75
arm 1 2.2 2024/05/08 11:06:00 37 2024/05/08 11:06:00 37
powerpc64 8 17.4 2024/05/08 10:35:00 103 2024/05/08 11:40:00 59
mips 3 6.5 2024/05/08 11:14:00 47 2024/05/08 11:23:00 241
mipsel 4 8.7 2024/05/08 11:01:00 39 2024/05/08 11:28:00 47
aarch64 6 13.0 2024/05/08 10:46:00 37 2024/05/08 11:57:00 41
riscv64 2 4.3 2024/05/08 11:52:00 30 2024/05/08 11:57:00 31
loongarch64 2 4.3 2024/05/08 11:06:00 38 2024/05/08 11:15:00 34
linux 45 97.8 2024/05/08 10:35:00 103 2024/05/08 11:58:00 0
aix 1 2.2 2024/05/08 11:02:00 81 2024/05/08 11:02:00 81
3.3.1 24 52.2 2024/05/08 10:46:00 37 2024/05/08 11:58:00 0
3.2.3 22 47.8 2024/05/08 10:35:00 103 2024/05/08 11:57:00 41

Source:

{ %CPU=I386 }
program test_fp_instructions;


  function test : extended;

  var
    x,y : integer;
    statusword,controlword : word;
    z,t : longint;
    a,b,c : comp;
    begin
       x:=5;
       c:=5;
       t:=5;
       z:=4;
       a:=20;
       { test all FPU instructions using 's' and 'l' suffix
         for word and dword size PM }
{$asmmode att}
       asm
         fildl z
         fiadds x
         fistpq b
         fildl z
         ficoms x
         fistpq b
         fildl z
         ficomps x
         fildl z
         fidivs x
         fistpq b
         fildl z
         fidivrs x
         fistpq b
         fildl z
         fisubs x
         fistpq b
         fildl z
         fisubrs x
         fistpq b
         fildl z
         fimuls x
         fistpq b
       end;
       if a<>b then
         begin
           Writeln('Error in FPU att syntax code generation');
           Halt(1);
         end;
       asm
         fildl z
         fiaddl t
         fistpq b
         fildl z
         ficoml t
         fistpq b
         fildl z
         ficompl t
         fildl z
         fidivl t
         fistpq b
         fildl z
         fidivrl t
         fistpq b
         fildl z
         fisubl t
         fistpq b
         fildl z
         fisubrl t
         fistpq b
         fildl z
         fimull t
         fistpq b
       end;
       if a<>b then
         begin
           Writeln('Error in FPU att syntax code generation');
           Halt(1);
         end;
       { test CW and SW instructions }
       { FSTSW FNSTSW
         FLDCW FSTCW FNSTCW }
       asm
         fstsw statusword
         fstsww statusword
         fnstsw statusword
         fnstsww statusword
         fstcw controlword
         fstcww controlword
         fnstcw controlword
         fnstcww controlword
         fldcw controlword
         fldcww controlword
       end;
{$asmmode intel}
       asm
         fild dword ptr z
         fimul dword ptr t
         fistp qword ptr b
         fild dword ptr z
         fimul word ptr x
         fistp qword ptr b
       end;
       if a<>b then
         begin
           Writeln('Error in FPU code generation');
           Halt(1);
         end;
       { test CW and SW instructions }
       asm
         fstsw word ptr [statusword]
         fnstsw word ptr [statusword]
         fstcw word ptr [controlword]
         fnstcw word ptr[controlword]
         fldcw word ptr [controlword]
       end;
       test:=b;
    end;

var
  z : extended;

begin
  z:=test;
end.

Link to SVN view of test/tfpu1.pp source.